Microprocessor Design Using Verilog HDL (E-book)
If you have the right tools, designing a microprocessor shouldn’t be complicated. The Verilog hardware description language (HDL) is one such tool. It can enable you to depict, simulate, and synthesize an electronic design, and thus increase your productivity by reducing the overall workload associated with a given project.
If you have the right tools, designing a microprocessor shouldn’t be complicated. The Verilog hardware description language (HDL) is one such tool. It can enable you to depict, simulate, and synthesize an electronic design, and thus increase your productivity by reducing the overall workload associated with a given project.
Monte Dalrymple’s Microprocessor Design Using Verilog HDL is a practical guide to processor design in the real world. It presents the Verilog HDL in a straightforward fashion and serves as a detailed introduction to reducing the computer architecture and as an instruction set to practice. You’re led through the microprocessor design process from start to finish, and essential topics ranging from writing in Verilog to debugging and testing are laid bare.
The book details the following, and more:
- Verilog HDL Review: data types, bit widths/labeling, operations, statements, and design hierarchy
- Verilog Coding Style: files vs. modules, indentation, and design organization
- Design Work: instruction set architecture, external bus interface, and machine cycle
- Microarchitecture: design spreadsheet and essential worksheets (e.g., Operation, Instruction Code, and Next State)
- Writing in Verilog: choosing encoding, assigning states in a state machine, and files (e.g., defines.v, hierarchy.v, machine.v)
- Debugging, Verification, and Testing: debugging requirements, verification requirements, testing requirements, and the test bench
- Post Simulation: enhancements and reduction to practice
SKU | 18518 |
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Language | English |
Manufacturer | Elektor Digital |
Author | Monte Dalrymple |
Pages | 341 |
Format | |
ISBN | 978-0-9630133-5-4 |